/**
 *******************************************************************************
 * @file commun_uart.h
 * @author .ISS_AUTO (hudandan@issauto.com)
 * @brief This file is interfaces for uart driver.
 *        MCU: N32G45x
 *
 * @date 2023-06-08    [本程序逻辑采用FIFO的方式在Uart中断中进行自动发送]
 *       2025-01-03    1. 优化接收发送的中断处理，新增函数 void USARTx_IRQHandler(uint8_t chan);
 *                     2. 优化非阻塞发送函数;
 *
 * @copyright Copyright (c) 2023 ISSAUTO TECH Co., Ltd. All rights reserved.
 *
 *******************************************************************************
 */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __COMM_UART_H
#define __COMM_UART_H

#ifdef __cplusplus
extern "C" {
#endif

/* Exported Includes ---------------------------------------------------------*/
#include "user_config.h"

#include "commun_queue.h" //!< commounication ringqueue

/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/

/******************************************************************************/
/*                                                                            */
/*         Universal Synchronous Asynchronous Receiver Transmitter            */
/*                                                                            */
/******************************************************************************/
/*******************  Bit definition for USART_SR register  *******************/
#define USART_SR_PE_Pos               (0U)
#define USART_SR_PE_Msk               (0x1UL << USART_SR_PE_Pos)             /*!< 0x00000001 */
#define USART_SR_PE                   USART_SR_PE_Msk                        /*!<Parity Error                 */
#define USART_SR_FE_Pos               (1U)
#define USART_SR_FE_Msk               (0x1UL << USART_SR_FE_Pos)             /*!< 0x00000002 */
#define USART_SR_FE                   USART_SR_FE_Msk                        /*!<Framing Error                */
#define USART_SR_NE_Pos               (2U)
#define USART_SR_NE_Msk               (0x1UL << USART_SR_NE_Pos)             /*!< 0x00000004 */
#define USART_SR_NE                   USART_SR_NE_Msk                        /*!<Noise Error Flag             */
#define USART_SR_ORE_Pos              (3U)
#define USART_SR_ORE_Msk              (0x1UL << USART_SR_ORE_Pos)            /*!< 0x00000008 */
#define USART_SR_ORE                  USART_SR_ORE_Msk                       /*!<OverRun Error                */
#define USART_SR_IDLE_Pos             (4U)
#define USART_SR_IDLE_Msk             (0x1UL << USART_SR_IDLE_Pos)           /*!< 0x00000010 */
#define USART_SR_IDLE                 USART_SR_IDLE_Msk                      /*!<IDLE line detected           */
#define USART_SR_RXNE_Pos             (5U)
#define USART_SR_RXNE_Msk             (0x1UL << USART_SR_RXNE_Pos)           /*!< 0x00000020 */
#define USART_SR_RXNE                 USART_SR_RXNE_Msk                      /*!<Read Data Register Not Empty */
#define USART_SR_TC_Pos               (6U)
#define USART_SR_TC_Msk               (0x1UL << USART_SR_TC_Pos)             /*!< 0x00000040 */
#define USART_SR_TC                   USART_SR_TC_Msk                        /*!<Transmission Complete        */
#define USART_SR_TXE_Pos              (7U)
#define USART_SR_TXE_Msk              (0x1UL << USART_SR_TXE_Pos)            /*!< 0x00000080 */
#define USART_SR_TXE                  USART_SR_TXE_Msk                       /*!<Transmit Data Register Empty */

#define USART_CR1_RXNEIE_Pos          (5U)
#define USART_CR1_RXNEIE_Msk          (0x1UL << USART_CR1_RXNEIE_Pos)        /*!< 0x00000020 */
#define USART_CR1_RXNEIE              USART_CR1_RXNEIE_Msk                   /*!<RXNE Interrupt Enable        */
#define USART_CR1_TCIE_Pos            (6U)
#define USART_CR1_TCIE_Msk            (0x1UL << USART_CR1_TCIE_Pos)          /*!< 0x00000040 */
#define USART_CR1_TCIE                USART_CR1_TCIE_Msk                     /*!<Transmission Complete Interrupt Enable */
#define USART_CR1_TXEIE_Pos           (7U)
#define USART_CR1_TXEIE_Msk           (0x1UL << USART_CR1_TXEIE_Pos)         /*!< 0x00000080 */
#define USART_CR1_TXEIE               USART_CR1_TXEIE_Msk                    /*!<TXE Interrupt Enable        */

#define USART_CR1_PEIE_Pos            (8U)
#define USART_CR1_PEIE_Msk            (0x1UL << USART_CR1_PEIE_Pos)          /*!< 0x00000100 */
#define USART_CR1_PEIE                USART_CR1_PEIE_Msk                     /*!<PE Interrupt Enable          */

#define USART_CR3_EIE_Pos             (0U)
#define USART_CR3_EIE_Msk             (0x1UL << USART_CR3_EIE_Pos)           /*!< 0x00000001 */
#define USART_CR3_EIE                 USART_CR3_EIE_Msk                      /*!<Error Interrupt Enable       */


/* Exported functions --------------------------------------------------------*/

#if defined(COMM_RING_QUEUE_TX) && (COMM_RING_QUEUE_TX)
/**
 * @brief Sends an amount of data in non blocking mode.
 *
 * @param[in] chan specified uart channel
 * @param[in] pDat the data to transmit
 * @param[in] pDatLen Amount of data elements (u8) to be sent
 */
int USARTx_SendData_NonBlocking(uint8_t chan, const uint8_t *pDat, uint32_t pDatLen);
#endif

/**
 * @brief  This function handles UART interrupt request.
 * @param[in] chan specified uart channel
 */
void USARTx_IRQHandler(uint8_t chan);

#ifdef __cplusplus
}
#endif

#endif /* __COMM_UART_H */

/* END OF FILE ---------------------------------------------------------------*/
